Linley Group: SAKURA-I Debuts for Edge AI
SAKURA-I (ASIC): Silicon Implementation Uses DNA IP for Low-Latency Inference
Renowned semiconductor industry analysts The Linley Group Microprocessor Report (TechInsights) titled "SAKURA-I DEBUTS FOR EDGE AI”, concludes "..SAKURA-I can be a serious contender in the edge-AI market."
The Linley Group's report provides a detailed overview of the debut of the novel SAKURA-I SoC for low-latency edge inference.
Sakura-I, revealed first at the recent Linley Spring (2022) Processor Conference, implements the company’s dynamic neural accelerator (DNA) engine, adding on-chip SRAM, two LPDDR4X ports, and I/O. The chip has no host CPU, so it operates under the control of an external host. Sakura-I has a maximum performance of 40 TOPS; on ResNet-50, it achieves 0.4ms latency at 4.7W, yielding 533 inferences per second per watt (IPS/W). The company plans to ship samples on a development board in Q4, with production anticipated in 1Q23.
EdgeCortix announced its DNA architecture as IP last year. Although its primary focus will be on selling chips, it intends to entertain IP business opportunistically. The company may also license Sakura-I hard IP for chiplets. It’s open sourcing the front end of its MERA compiler so future formats will be available to the tool.