EdgeCortix Announces SAKURA-I AI Co-Processor Delivering Industry Leading Low-Latency and Energy-Efficiency

Today, at the prestigious TechInsights' Linley Spring Processor Conference, EdgeCortix officially introduced its flagship energy-efficient AI co-processor (accelerator), branded SAKURA-I™.  Designed entirely in their Tokyo based development center, the company announced that SAKURA-I is produced by TSMC on the popular 12nm FinFET technology and will be available as low-power PCIe based development boards to participating companies of the EdgeCortix Early Access Program (EAP) in July of 2022.

"SAKURA-I is revolutionary from both a technical and competitive perspective, delivering well over 10X performance/watt advantage compared to current AI inference solutions based on traditional graphics processing units (GPUs), especially for real-time edge applications.", said Sakyasingha Dasgupta, CEO and Founder of EdgeCortix, "After validating our AI processor architecture design with multiple field-programmable gate array (FPGA) customers in production, we designed SAKURA-I as a co-processor that can be plugged in alongside a host processor in nearly all existing systems to significantly accelerate AI inference. Using our patented runtime-reconfigurable interconnect technology, SAKURA-I is inherently more flexible than traditional processors and can achieve near optimal compute utilization in contrast to most AI processors that have been developed over the last 40+ years."

SAKURA-I is powered by a 40 trillion operations per second (TOPS), single core Dynamic Neural Accelerator® (DNA) Intellectual Property (IP), which is EdgeCortix's proprietary neural processing engine with built-in reconfigurable data path connecting all compute engines. DNA enables the new SAKURA-I AI co-processor to run multiple deep neural network models together, with ultra-low latency, while preserving exceptional TOPS utilization. This unique attribute is key to enhancing the processing speed, energy efficiency, and longevity of the system-on-chip, providing exceptional total cost of ownership benefits. The DNA IP is specifically optimized for inference with streaming and high-resolution data.

Key industrial segments where the SAKURA-I performance profile is ideally suited include: transportation / autonomous vehicles, defense, security, 5G communications, augmented & virtual reality, smart manufacturing, smart cities, smart retail and robotics, all markets that require low power, low latency AI inference.

The company announced that SAKURA-I will also be available to customers for purchase in multiple hardware form factors, and the underlying IP can be licensed in conjunction with EdgeCortix's software stack for customers designing their own proprietary semiconductors.

Key SAKURA-I features include:

• Up to 40 TOPS (single-chip version) and 200 TOPS (multi-chip version).
• PCI-e Device Nominal Power ~8W.
• Typical model power consumption ~5W.
• 2x64 LPDDR4x – 16 GB.
• PCIe Gen 3 up to 16 GB/s bandwidth.
• Two form factors – Dual M.2 and Low-profile PCIe.

The DNA processing engine within SAKURA-I delivers:

• Over 24K MACs in single core @ 800 MHz.
• Optimized for INT8 and batch size 1.
• Runtime-reconfigurable data-path.
• Relatively large on-chip memory at 20 MB.
• Maximizes compute utilization by exploiting multiple degrees of parallelism defined by software.
• Extreme low latency (< 4 ms) on demanding workloads, e.g., object detection models (Yolo-v3, Yolo-v5), multiple stream video analytics, neural network-based point-cloud data processing, etc.

The company also officially announced the open-source release of their MERATM compiler software framework effective immediately.  MERA enables seamless acceleration of today's increasingly complex and compute intensive AI workloads, allowing software engineers to use SAKURA-I, as well as leading FPGAs powered by DNA IP and other 3rd party silicon, as drop-in replacements for CPUs or GPUs. Without leaving their comfort zone of standard frameworks like PyTorch, TensorFlow and ONNX, software engineers can leverage MERA to easily port models currently running on GPUs, seamlessly to the SAKURA-I accelerator, without any re-training.

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